There doesn't seem to be much detail anywhere else either. All I was able to gather was that the memory dies are stacked (not new) but that the vias connecting the stack are angled instead of straight up and down and this is better because ... reasons?
I think the reasoning is better thermals and signal stability. The physics of the first seem to be that there is more metal to capture and distribute heat, but the signal integrity part beats me. By having better thermals, they can increase the memory clock and, thus, bandwidth and reduce latency.
«[T]he primary standout feature of this memory solution is the integration of a staggered interconnect topology that routes connections diagonally within the die stack rather than drilling straight down. According to Intel, the biggest benefit lies in ZAM's thermal capabilities.»
The connectors on the side indeed look like the letter Z. Maybe it disperses the stronger currents across the stack of the crystals, instead of concentrating.
I'd guess that it'd allow for thinner layers which is ultimately why you can pack in more memory.
And why it's not currently done is likely because it's hard enough to stack when everything is uniform. A small deformity in the first layer will spoil the entire chip.
